About

Work Experience

• Senior Applications Engineer, Infineon technologies

  Apr, 2022 - Present

  I have worked on 3 major aspects i.e., regulatory, hardware, and software during my role here along with writing blogs, and knowledge articles, and providing training to end users. I have also mentored interns and new hires to the team.

  • Built CLM BLOBs for every Wi-Fi radio of Infineon.

  • Working knowledge of 802.11a,b,g,n,ac,ax, and Wi-Fi 6E.

  • I have also worked on 802.11d, auto country implementation.

  • Defined the templates to be used for CLM BLOBs in Wi-Fi 6 and 6E.

  • Worked with various stakeholders in identifying bugs in CLM BLOBs and fixing them for Wi-Fi 6 and 6E.

  • Performed schematic and PCB reviews.

  • Worked on NVRAM to vary and achieve various power requirements.

  • Have basic knowledge of TSSI calibration.

• Applications Engineer , Cypress Semiconductor

  Jun, 2019 - Mar, 20222 years 9 months

  I started working on Cypress' Wi-Fi portfolio in my first job out of college. This gave me exposure to how customers work, and introduced me to product design cycles.

  • Automated Infineon's WIFI regulatory flow and reduced the time needed for CLM BLOB generation from a few weeks to a few mins.

  • Working experience on WICED, Modus ToolBox, Makefiles, Linker scripts.

  • Experienced in bringing up Linux platforms and building Wi-Fi FMAC drivers on top of that. Proprietary WL tool generation is also a part of this.

  • Have an understanding of IEEE power save, roaming and fast roaming (802.11k,r).

  • Experience in working with IOCTL's and IOVAR's and their interaction with the WLAN firmware.

  • Developed code examples and demo solutions showcasing the functionality of Wi-Fi products.

• Co-Op Bachelors, Cypress Semiconductor

  Jan, 2019 - May, 20194 months

  I learned some basics about Bluetooth and I learned a few Bluetooth protocols in this 6-month internship program.

Projects Experience

• SoC: Planning and Prototyping

  Jan, 2023 - May, 20234 months

  • I implemented a PoC for performance optimization using timing-driven placements on SoC PnP. This involved generating a Liberty file using TCL by querying internal data and later running timing-driven placements on OpenRoad.

• Clock and data recovery circuits

  Jan, 2022 - Apr, 20223 months

  • Designed linear and bang-bang clock and data recovery circuits with forwarded as well as not forwarded clock for data running at around 5Gbps in LtSpice as part of a course, VLSI and Broadband Communication Circuits.

• 8*8 Signed Multiplier

  Jul, 2021 - Aug, 20211 month

  • Designed both schematic and layout of an 8*8 signed multiplier using CMOS full adders in Electric, did critical path analysis and increased the clock speed through pipelining as part of a course, Digital IC Design.

• V-Sense

  May, 2019 - Aug, 20188 months

  • This was my final year project in B.Tech. This involved using a pressure-sensitive material and a grid designed to detect and map the applied pressure at a point and transmit it wirelessly to an end application. A patent was filed for this.

• Hobby projects

  Aug, 2015 - May, 20193 years 9 months

  • Home automation, wireless communication(WIFI, BT, RF, DTMF), multiple types of robots, drowsiness detection using brainwaves.

Skills

Education

Volunteer Work

Publications

Interests

References